FPGA implementation of digital differentiator using Richardson extrapolation and high sampling rate acting like fractional delay

Differentiator is widely used to calculate derivative of measured signal in many fields. To improve characteristics of frequency responses, a differentiator using Richardson extrapolation and fractional delay has been proposed. However, to implement fractional delay, some sort of high-order interpolator is needed, which causes many problems. In this paper, to resolve the problems caused by the high-order interpolator, a higher sampling rate system is implemented on FPGA, which acts like a system using fractional delay. A way to implement the proposed method on FPGA is described, and its effectiveness is verified by some experiments.