Title :
An efficient estimation technique in data path synthesis
Author :
Liang-Ying Liu ; Jhing-Fa Wang ; Jau-Yien Lee
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Abstract :
An O(n/sup 2/) procedure for estimating the data path cost is proposed. This procedure predicts the hardware requirement in the timing-constraint scheduling problem by analysing the data-flow graph in stead of making efforts on scheduling and allocation. A mesh structure is introduced for computing the minimal hardware request at control step intervals. The estimate is very near the optimum and is proved being a lower bound of optimum solution. Experimental results show the closeness to the optimum and the significant speedup in the run time.<>
Keywords :
circuit CAD; scheduling; control step intervals; data path synthesis; efficient estimation technique; hardware requirement; lower bound; mesh structure; optimum solution; timing-constraint scheduling problem; Automatic control; Automatic generation control; Cost function; Councils; Data analysis; Data flow computing; Hardware; Pipelines; Processor scheduling; Timing;
Conference_Titel :
TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on
Conference_Location :
Beijing, China
Print_ISBN :
0-7803-1233-3
DOI :
10.1109/TENCON.1993.320024
