Analysis of Min-Sum based decoders implemented on noisy hardware

Motivated by the problem of designing fault-tolerant memories built out from unreliable components, this paper investigates the performance of two noisy Min-Sum-based decoders on Binary Symmetric Channels. We analyze the performance of the noisy Min-Sum decoder in terms of useful regions and target bit-error rate threshold values, derived by using “noisy” density evolution equations. We also present the finite length performance of two Min-Sum based decoders, and point out the excellent performance of the noisy Self-Corrected Min-Sum decoder, which exhibits almost the same performance as the noiseless decoder.