A partially-adiabatic energy-efficient logic family as a power analysis attack countermeasure

Power analysis can be used to infer the types of computations a computer system performs as well as the information being processed. In environments where it is essential that this information be kept secure, methods that make this information difficult to determine are of value. A partially-adiabatic technology is studied for its ability to obscure the information being processed in the circuit. In this initial study, an analysis of an AND/NAND gate is performed using input decoupled partially-adiabatic logic (IDPAL) circuits. The technology reduces peak current in this circuit by almost a factor of four and has lower variation of peak current between inputs. These key features of the circuit suggest increased security as a result of increasing the difficulty for determining the circuit´s workings.