Title :
Logarithmic arithmetic as an alternative to floating-point: A review
Author :
Chugh, Manik ; Parhami, Behrooz
Author_Institution :
Dept. Electr. & Comput. Eng., Univ. of California, Santa Barbara, Santa Barbara, CA, USA
Abstract :
The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with the widely used floating-point (FP) number formats. We review the sign/logarithmic number system and present a comparison of various techniques and architectures for performing arithmetic operations efficiently in LNS. As a case study, we describe the European logarithmic microprocessor, a device built in the framework of a research project launched in 1999. Comparison of the arithmetic performance of this microprocessor with that of a commercial superscalar pipelined FP processor leads to the conclusion that LNS can be successfully deployed in general-purpose systems.
Keywords :
floating point arithmetic; microprocessor chips; pipeline arithmetic; European logarithmic microprocessor; digital arithmetic; floating-point number formats; logarithmic number system; superscalar pipelined FP processor; Accuracy; Adders; Computers; Europe; Microprocessors; Performance evaluation; Read only memory; ALU design; computation errors; instruction-set architecture; interpolation; logarithmic number system; machine arithmetic; performance per watt; real arithmetic;
Conference_Titel :
Signals, Systems and Computers, 2013 Asilomar Conference on
Conference_Location :
Pacific Grove, CA
Print_ISBN :
978-1-4799-2388-5
DOI :
10.1109/ACSSC.2013.6810472