DocumentCode :
2039970
Title :
Model checking of signal interpreted Petri nets
Author :
Weng, Xiying ; Litz, Lathar
Author_Institution :
Inst. of Process Autom., Kaiserslautern Univ., Germany
Volume :
4
fYear :
2001
fDate :
2001
Firstpage :
2748
Abstract :
We present an approach to verify the properties of a specification for logic control design with signal interpreted Petri net (SIPN) by applying temporal logic model checking methods, which also allows one to study the unstable cycle in the design
Keywords :
Petri nets; compressors; digital control; formal verification; temporal logic; compressor; formal verification; logic control; model checking; signal interpreted Petri net; specification language; temporal logic; Automatic control; Control design; Design automation; Logic design; Petri nets; Process control; Programmable control; Signal design; Signal processing; Specification languages;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Systems, Man, and Cybernetics, 2001 IEEE International Conference on
Conference_Location :
Tucson, AZ
ISSN :
1062-922X
Print_ISBN :
0-7803-7087-2
Type :
conf
DOI :
10.1109/ICSMC.2001.972982
Filename :
972982
Link To Document :
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