DocumentCode :
20405
Title :
A 57.9-to-68.3 GHz 24.6 mW Frequency Synthesizer With In-Phase Injection-Coupled QVCO in 65 nm CMOS Technology
Author :
Xiang Yi ; Chirn Chye Boon ; Hang Liu ; Jia Fu Lin ; Wei Meng Lim
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
Volume :
49
Issue :
2
fYear :
2014
fDate :
Feb. 2014
Firstpage :
347
Lastpage :
359
Abstract :
A fully integrated 60 GHz frequency synthesizer with an in-phase injection-coupled quadrature voltage-controlled oscillator (IPIC-QVCO) is proposed. Through a particular symmetrical coupling network formed by diode-connected transistors, the in-phase coupling is realized in the IPIC-QVCO, which reduces both phase noise and phase error. A compact inductor-less divider chain is designed to reduce power consumption. A self-correcting low spur charge pump is employed to reduce reference spur. A standalone 60 GHz IPIC-QVCO and a fully integrated PLL are implemented in standard 65 nm low power CMOS technology. The measurement results show that the QVCO covers a frequency range from 57.88 to 68.33 GHz while consuming 11.4 mW power from a 1.2 V supply. The phase noise of the QVCO is -92 ~ -95 dBc/Hz at 1 MHz offset. The FOM and FOM T of the QVCO are -178.1 ~ -179.7 and -182.5 ~ -184.1 dBc/Hz respectively. The tuning range of the frequency synthesizer is from 57.9 to 68.3 GHz, and the power consumption is 24.6 mW. The phase noise of the frequency synthesizer is -89.8 ~ -91.5 dBc/Hz at 1 MHz offset across the frequency band.
Keywords :
CMOS integrated circuits; coupled circuits; frequency synthesizers; low-power electronics; millimetre wave oscillators; phase locked loops; phase noise; voltage-controlled oscillators; IPIC-QVCO; compact inductorless divider chain; diode connected transistor; frequency 57.9 GHz to 68.3 GHz; frequency 60 GHz; frequency synthesizer; fully integrated PLL; in-phase coupling; in-phase injection coupled QVCO; low power CMOS technology; phase error; phase noise; power 11.4 mW; power 24.6 mW; power consumption reduction; quadrature voltage controlled oscillator; reference spur reduction; self correcting low spur charge pump; size 65 nm; symmetrical coupling network; voltage 1.2 V; Couplings; Frequency synthesizers; Phase locked loops; Phase noise; Transistors; 60 GHz; CMOS; PLL; frequency synthesizer; in-phase injection-coupled (IPIC); low phase error; low phase noise; low power; millimeter-wave; quadrature voltage-controlled oscillator (QVCO);
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2013.2293021
Filename :
6680782
Link To Document :
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