DocumentCode
2040916
Title
2-π Crosstalk noise model for deep submicron VLSI global RC interconnects
Author
Maheshwari, V. ; Anushree ; Mazumdar, Subhra ; Kar, Rajib ; Mandal, Durbadal ; Bhattacharjee, A.K.
Author_Institution
Dept. of ECE, Hindustan Coll. of Sci. & Technol., Mathura, India
fYear
2012
fDate
5-6 Nov. 2012
Firstpage
225
Lastpage
229
Abstract
Noise estimation and avoidance are becoming very important issues in today´s high performance IC design. This paper presents a much improved, highly accurate and efficient noise model called 2-π model for the estimation of crosstalk noise. The proposed model incorporates all the physical properties including victim and aggressor drivers, distributed RC characteristics of interconnects and coupling locations of both victim and aggressor lines. Then with the help of this model, expressions for peak noise and noise width as well as sensitivity expressions to the various model parameters are calculated. We then use these sensitivity expressions to analyze and evaluate the effectiveness of various noise avoidance techniques for the reduction of this crosstalk noise.
Keywords
RC circuits; VLSI; crosstalk; integrated circuit noise; interference suppression; aggressor lines; crosstalk noise model; crosstalk noise reduction; deep submicron VLSI global RC interconnects; distributed RC characteristics; high performance IC design; noise avoidance; noise estimation; noise width; peak noise; sensitivity expression; 2-π Crosstalk Noise Model; Crosstalk; Noise modelling; On-Chip RC Interconnect; VLSI;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Design, Systems and Applications (ICEDSA), 2012 IEEE International Conference on
Conference_Location
Kuala Lumpur
ISSN
2159-2047
Print_ISBN
978-1-4673-2162-4
Type
conf
DOI
10.1109/ICEDSA.2012.6507803
Filename
6507803
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