DocumentCode
2041077
Title
A structured system methodology for FPGA based system-on-a-chip design
Author
Sedcole, Pete ; Cheung, Peter Y K ; Constantinides, George ; Luk, Wayne
Author_Institution
Imperial Coll., London, UK
fYear
2004
fDate
20-23 April 2004
Firstpage
271
Lastpage
272
Abstract
The ever increasing quantities of logic resources combined with heterogeneous integrated performance enhancing primitives in high-end FPGAs creates a design complexity challenge that requires new methodologies to address. We present a structured system based design methodology which aims to increase productivity and exploit reconfigurability in large scale FPGAs. The methodology is exemplified by sonic-on-a-chip, a video image processing system.
Keywords
field programmable gate arrays; logic design; system-on-chip; video signal processing; heterogeneous integrated performance; high end FPGA; logic resources; productivity; reconfigurability; sonic-on-a-chip; structured system methodology; system-on-a-chip design; video image processing; Computer architecture; Costs; Design methodology; Engines; Field programmable gate arrays; Hardware; Physical layer; Productivity; System-on-a-chip; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on
Print_ISBN
0-7695-2230-0
Type
conf
DOI
10.1109/FCCM.2004.10
Filename
1364637
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