Architectural implementation of high speed optical flow computation based on Lucas-Kanade algorithm

Optical flow study of visual motion has been the major area of interest among researchers for many years. It has been largely inapplicable to real-time applications, until recently, due to its computationally expensive nature. Optical flow computation in visual-based systems demands for computational power and storage area constraints. For enabling real-time processing at high resolution, the design of application-specific system for optical flow becomes essential. This paper proposes, an efficient VLSI architecture for accurate computation of the high speed Lucas-Kanade (L-K) based optical flow. The proposed architecture is simulated and verified by synthesizing onto a Model Sim 6.4a and Altera Quartus-II, which utilize less than 40% of system resources, operating at a frequency of 500MHz having low power consumption. This paper also describes the proposed design can process 1200×680 images at a high frame rate of 500-700fps in the proposed low cost FPGA-chip.