Title :
Assembly and testing of thermal test chip on silicon interposer with Through Silicon Via
Author :
Ziyu Liu ; Jian Cai ; Qian Wang ; Xi He ; Shuidi Wang
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Abstract :
Silicon interposer with Through Silicon Via (TSV) has been a promising technology for 3D integration. Good thermal property is one of the advantages. Thermal resistance was usually used to estimate thermal property of a package. In order to obtain thermal resistance of silicon interposer, chip junction temperature needs to be measured. However, it is a challenge to acquire junction temperature Tj because hotspot in chip is difficult to be detected. In this work, thermal test chip containing diodes was employed to calibrate the junction temperature. Testing vehicle and assembly process of thermal test chip and silicon interposer with TSV were designed and realized. Firstly, fabrication of silicon interposer with TSVs was introduced briefly meanwhile resistance of TSV was measured by daisy chain structure. Then assembly of silicon interposer and thermal test chip was completed by high lead solder ball. Finally the assembled vehicle was mounted on printed circuit board (PCB). The electrical property of the whole assembly as well as linear coefficient of forward voltage Vf and junction temperature were achieved to evaluate the testing vehicle. The electrical resistance of TSV with 25μm diameter and 125μm depth was 144mΩ calculated from daisy chain structure. Low assembly electrical resistance, which is equivalent to the theoretical value, illustrated good assembly quality of the testing vehicle. Good linear characteristic of voltage and temperature for thermal test chip also indicated successful testing vehicle design as well as thermal resistance of silicon interposer could be measured in further study.
Keywords :
elemental semiconductors; integrated circuit design; integrated circuit testing; printed circuits; silicon; solders; thermal resistance; three-dimensional integrated circuits; 3D integration; PCB; Si; TSV; chip junction temperature; daisy chain structure; electrical property; high lead solder ball; junction temperature; linear coefficient; low assembly electrical resistance; printed circuit board; resistance 144 mohm; silicon interposer fabrication; size 25 mum; testing vehicle design; thermal property; thermal property estimation; thermal resistance; thermal test chip assembly; thermal test chip testing; through silicon via;
Conference_Titel :
Electronic Materials and Packaging (EMAP), 2012 14th International Conference on
Conference_Location :
Lantau Island
Print_ISBN :
978-1-4673-4945-1
Electronic_ISBN :
978-1-4673-4943-7
DOI :
10.1109/EMAP.2012.6507862