Title :
HOOVER: hardware object-oriented verification
Author :
Aref, Mostafa M. ; Elleithy, Khaled M.
Author_Institution :
Dept. of Inf. & Comput. Sci., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
Abstract :
In this paper a new formal hardware verification approach based on object oriented techniques is presented. The HOOVER system (Hardware Object Oriented VERification) is described. A cell library of different hardware components has been implemented as classes. Components in the cell library are described at the transistor level, gate level, logical level, and functional level. The verification of a CMOS inverter and 1-bit CMOS adder using HOOVER is given in the paper
Keywords :
circuit CAD; digital integrated circuits; formal verification; integrated circuit design; logic CAD; object-oriented methods; HOOVER system; cell library; formal hardware verification; functional level; gate level; hardware object-oriented verification; logical level; transistor level; Computer science; Encapsulation; Formal verification; Hardware; Inverters; Libraries; Logic; Object oriented modeling; Petroleum; Specification languages; Timing;
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
Print_ISBN :
0-8186-8409-7
DOI :
10.1109/GLSV.1998.665308
