An automatic circuit extractor from a photomicrograph of integrated circuits

Investigates the problem of extracting a circuit from the photomicrograph of integrated circuits. It involves processing of the high resolution gray-level image of an integrated circuit layout captured using a high power optical microscope and a CCD camera. The final output is a Netlist Description of the circuit. The possible applications of the result are in the area of design verification, simulation, fault diagnosis and failure analysis, where a full circuit description in terms of Netlist is required. The circuit description of the layout follows the SPICE circuit simulation format. The approach consists of first processing the image captured to translate the gray-scale image of the layout circuit into Caltech Intermediate Form (CIF) code. These CIF codes are then processed to obtain the Reflist description of the circuits. The results have been very good and are reported in this paper.<>