• DocumentCode
    2045724
  • Title

    RAW keynote 2: new horizons of very high performance computing (VHPC): hurdles and chances

  • Author

    Hartenstein, Reiner

  • Author_Institution
    TU Kaiserslautern
  • fYear
    2006
  • fDate
    25-29 April 2006
  • Abstract
    Summary form only given. Reconfigurable computing (RC) delivers the success story of the century. First launched by the hardware/software co-design scene by adopting FPGAs for embedded system design, now a huge second wave has reached a wide variety of scientific computing communities. Google´s yawdropping hit rates illustrate the pervasiveness of reconfigurable computing, now also being adopted by super computing (Cray, sgi, etc.). From FPGA usage as accelerators, speed-up factors by up to four orders of magnitude and more are reported, as well as floor space requirements and electricity invoice amounts reduced by one order of magnitude and more. This is astonishing, since FPGAs and rDPAs have a substantially lower clock speed than microprocessors and an effective integration density being lower by four orders of magnitude: the reconfigurable computing paradox. Algorithmic cleverness is the secret of success, based on software to configware migration mechanisms, striving away from memory-cycle-hungry instruction stream-based computing paradigms. Even higher speedup is achievable by using coarse-grained reconfigurable datapath arrays (rDPAs) available from a number of start-ups. With automatically partitioning configware/software cocompilers the desktop personal supercomputer is near. The main benefit of RC, having replaced the use of hardwired accelerators, is their flexibility by non-procedural programmability. This also contributes to more recent developments in system architecture, which rely on processes of evolution, self-organization, adaptation and fault tolerance. The main hurdles on the way to heart-stopping new horizons of cheap highest performance are CS-related educational deficits causing the configware/software chasm and a methodology fragmentation between the different cultures of application domains. Since the von Neumann paradigm is loosing its dominance by emerging reconfigurable main processors using hardwired von Neumann coprocessors as auxilia- - ry clerks, it is time for a curricular upgrade. Current CS curricula do not sufficiently meet their transdisciplinary responsibility. The talk gives a survey on fundamental issues in RC and on new directions in CS-related curricula, focused on a dual paradigm organic computing approach
  • Keywords
    computer science education; educational courses; reconfigurable architectures; algorithmic cleverness; configware migration mechanism; desktop personal supercomputer; embedded system; field programmable gate array; nonprocedural programmability; organic computing; partitioning configware; reconfigurable computing paradox; reconfigurable datapath arrays; reconfigurable main processor; scientific computing; software cocompiler; super computing; very high performance computing; Clocks; Embedded software; Embedded system; Field programmable gate arrays; Hardware; High performance computing; Layout; Microprocessors; Pervasive computing; Scientific computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
  • Conference_Location
    Rhodes Island
  • Print_ISBN
    1-4244-0054-6
  • Type

    conf

  • DOI
    10.1109/IPDPS.2006.1639429
  • Filename
    1639429