DocumentCode
2046250
Title
Cooperative multithreading on embedded multiprocessor architectures enables energy-scalable design
Author
Schaumont, Patrick ; Lai, Bo-Cheng Charles ; Qin, Wei ; Verbauwhede, Ingrid
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
2005
fDate
13-17 June 2005
Firstpage
27
Lastpage
30
Abstract
We propose an embedded multiprocessor architecture and its associated thread-based programming model. Using a cycle-true simulation model of this architecture, we are able to estimate energy savings for a threaded C program. The savings are obtained by voltage- and frequency-scaling of the individual processors. We port a fingerprint minutiae detection application onto this architecture, and show the resulting performance on single-, dual-, and quad-processor configurations. The energy-scaled quad-processor version results in a 77 % energy reduction over the single-processor non-scaled implementation, at only a 2.2 % degradation in cycle count.
Keywords
C language; embedded systems; logic simulation; microprocessor chips; multiprocessing systems; system-on-chip; C program; cooperative multithreading; cycle-true simulation model; dual-processor configuration; embedded multiprocessor; energy reduction; energy-scalable design; fingerprint minutiae detection; frequency-scaling; multiprocessor architecture; quad-processor configuration; single-processor configuration; thread-based programming model; voltage-scaling; Clocks; Degradation; Embedded system; Energy consumption; Fingerprint recognition; Frequency; Multithreading; Permission; Processor scheduling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings. 42nd
Print_ISBN
1-59593-058-2
Type
conf
DOI
10.1109/DAC.2005.193767
Filename
1510286
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