Title :
Deterministic self-test of a high-speed embedded memory and logic processor subsystem
Author :
Ternullo, Luigi, Jr. ; Adams, R. Dean ; Connor, John ; Koch, Garret S.
Author_Institution :
Microelectron. Div., IBM Corp., Essex Junction, VT, USA
Abstract :
A memory built-in self-test state machine (MBIST) was designed to test multiple RAMs, each with differing characteristics with deterministic patterns. These memories are all tested in parallel with a BIST that uses a high-performance pipelined architecture to supply patterns from a single centralized memory BIST state machine at memory cycle speeds. After verifying the RAM integrity, the state machine generates the minimum set of deterministic patterns required to test the associated comparator logic and applies the patterns through the corresponding RAMs to accomplish a 100% stuck fault logic test
Keywords :
CMOS memory circuits; built-in self test; deterministic automata; fault location; integrated circuit testing; logic testing; pipeline processing; random-access storage; BIST; CAM logic; CMOS; RAM integrity; associated comparator logic; built-in self-test state machine; centralized memory BIST state machine; deterministic patterns; deterministic self-test; high-performance pipelined architecture; high-speed embedded memory; logic processor subsystem; memory cycle speed; multiple RAM; sequential testing; state machine; stuck fault logic test; Automatic testing; Built-in self-test; CADCAM; Circuit testing; Computer aided manufacturing; Logic design; Logic testing; Microprocessors; Random access memory; Test pattern generators;
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2992-9
DOI :
10.1109/TEST.1995.529815
