Improved charge pump phase detector for digital phase-locked loop

The impact of dead band in charge pump phase detectors on the performance of DPLLs (Digital Phase-Locked Loops) has been well reported for a number of years. It is widely accepted that the standard form of charge pump phase detector tends to suffer from an inability to track small phase perturbations at its input. This tends to arise from the technology employed, which is generally MOS based, since it lends itself to both low cost and low power implementation. Consequently, techniques have to-be employed which remove the nonlinear gain region such that during the zero phase error condition the current sources are switched on for a finite period of time (thus removing the dead band condition). A drawback with this technique is that an increased noise current is injected into the loop, and consequently, the phase noise close-to-carrier may degrade. The purpose of this paper is to discuss in detail the imperfections which arise in charge pump phase detectors, analysing both spurious and phase noise mechanisms. This leads to an improved charge pump arrangement which provides both improved sideband suppression and phase noise performance