Title :
Dynamically reconfigurable cache architecture using adaptive block allocation policy
Author :
Carvalho, Milene B. ; Góes, Luís F W ; Martins, Carlos A P S
Author_Institution :
Computational & Digital Syst. Lab., Pontifical Catholic Univ. of Minas Gerais, Belo Horizonte, Brazil
Abstract :
In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propose a reconfigurable cache architecture and to propose, implement and analyze the performance of an adaptive cache block allocation policy. First, we present a proposal of the reconfigurable cache architecture that can adapt according to the workload. Then we present our adaptive policy and do some performance tests comparing our cache architecture with some set associative configurations. In these tests, we use some traces from BYU Trace Distribution Center of SPEC 2000 Benchmark. Finally, we analyze the results based on some metrics like cache miss ratio, response time, etc.
Keywords :
cache storage; performance evaluation; reconfigurable architectures; resource allocation; adaptive block allocation policy; cache miss ratio; cache response time; dynamically reconfigurable cache architecture; set associative configuration; Analytical models; Computational modeling; Computer architecture; Delay; Design optimization; Digital systems; Laboratories; Performance analysis; Proposals; Testing;
Conference_Titel :
Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Print_ISBN :
1-4244-0054-6
DOI :
10.1109/IPDPS.2006.1639487