Critical search delay measurement in embedded content addressable memories with BIST

Embedded content addressable memories are very useful in many applications such as network switch, IP filters and longest prefix match search engine, where high speed search is essential. This makes it a necessity to find an efficient self-test methodology in order to measure its internal worst case search speed. This paper presents a pseudo CMOS logic (PC) based ternary content addressable memory (TCAM) system using novel 11 T cell structure in addition with embedded built-in self-test approach. This approach contributes in building an efficient and flexible CAM system with an emphasis on its maximum critical search speed measurement under worst case operation. The experimental results show that the presented BIST methodology is more effective and provides improved search delay measurement such as 1.72 ns and a power performance metric such as 0.202 fJ/bits/Searchers in the 256 × 128 PC-TCAM system.