DocumentCode :
2047391
Title :
A nanopower single-trim voltage reference in a 0.13/im digital CMOS process
Author :
Sun, Yueming ; Lou, Jiana ; Wu, Xiaobo
Author_Institution :
Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China
fYear :
2010
fDate :
21-24 Nov. 2010
Firstpage :
1141
Lastpage :
1145
Abstract :
A nanopower single-trim CMOS voltage reference in SMIC 0.13 μm digital process is proposed. It utilizes a subthreshold nMOSFET biased by a proportional to absolute temperature (PTAT) current to generate a negative temperature coefficient (TC) voltage, which is used to obtain a mutual compensating reference voltage together with a PTAT voltage. Simulated results indicate the proposed reference has a temperature coefficient of 4.82 ppm/°C over the operating range from -20 to 80°C and a line regulation of 3.4 mV/V over the supply range from 1.2 to 3 V. The simulated power consumption is 648 nW.
Keywords :
CMOS digital integrated circuits; MOSFET; reference circuits; PTAT voltage; SMIC digital process; digital CMOS process; line regulation; mutual compensating reference voltage; nanopower single-trim CMOS voltage reference; negative temperature coefficient voltage; power 648 nW; proportional to absolute temperature; simulated power consumption; size 0.13 mum; subthreshold nMOSFET; temperature -20 degC to 80 degC; voltage 1.2 V to 3 V;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location :
Fukuoka
ISSN :
pending
Print_ISBN :
978-1-4244-6889-8
Type :
conf
DOI :
10.1109/TENCON.2010.5686401
Filename :
5686401
Link To Document :
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