DocumentCode
2047542
Title
A high throughput digital Rank Order Filter in 0.18um CMOS technology
Author
Toscano, George John ; Saha, Pran Kanai
Author_Institution
Dept. of Electr. Eng., American Int. Univ.-Bangladesh, Dhaka, Bangladesh
fYear
2010
fDate
21-24 Nov. 2010
Firstpage
1123
Lastpage
1128
Abstract
A high throughput digital Rank Order Filter (ROF) based on a modified bit-level algorithm has been implemented by using 0.18 μm CMOS technology and is presented in this paper. Parallel processing technique is used to increase the Filter speed and throughput. The proposed ROF is capable of giving the element of a certain rank from a given sequence of N elements in each window in each clock pulse by parallely operating M number of Rank Selection Circuits (RSCs). The performance of the proposed filter was investigated through Spice simulation. The simulation result was compared with that obtained from post fit simulation using FPGA.
Keywords
CMOS digital integrated circuits; SPICE; digital filters; parallel processing; CMOS technology; SPICE simulation; clock pulse; high throughput digital rank order filter; modified bit-level algorithm; parallel processing technique; rank selection circuits; size 0.18 mum; CMOS; ROF Fitter; bit algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location
Fukuoka
ISSN
pending
Print_ISBN
978-1-4244-6889-8
Type
conf
DOI
10.1109/TENCON.2010.5686407
Filename
5686407
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