• DocumentCode
    2047549
  • Title

    Closing the power gap between ASIC and custom: an ASIC perspective

  • Author

    Chinnery, D.G. ; Keutzer, K.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
  • fYear
    2005
  • fDate
    13-17 June 2005
  • Firstpage
    275
  • Lastpage
    280
  • Abstract
    We investigate differences in power between application-specific integrated circuits (ASICs) and custom integrated circuits, with examples from 0.6μm to 0.13μm CMOS. A variety of factors cause synthesizable designs to consume ×3 to ×7 more power. We discuss the shortcomings of typical synthesis flows, and changes to tools and standard cell libraries needed to reduce power. Using these methods, we believe that the power gap between ASICs and custom circuits can be closed to within ×2.
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; integrated circuit design; 0.6 to 0.13 micron; ASIC; CMOS integrated circuits; application-specific integrated circuits; custom integrated circuits; standard cell libraries; synthesizable designs; Application specific integrated circuits; Cooling; Design optimization; Discrete cosine transforms; Energy consumption; Fabrication; Integrated circuit synthesis; Permission; Power engineering computing; Transform coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings. 42nd
  • Print_ISBN
    1-59593-058-2
  • Type

    conf

  • DOI
    10.1109/DAC.2005.193816
  • Filename
    1510335
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2047549