DocumentCode :
2047975
Title :
Overview of PowerPC 620 multiprocessor verification strategy
Author :
Yen, Jen-Tien ; Sullivan, Marie ; Montemayor, Carlos ; Wilson, Pete ; Evers, Richard
Author_Institution :
IBM Corp., Austin, TX, USA
fYear :
1995
fDate :
21-25 Oct 1995
Firstpage :
167
Lastpage :
174
Abstract :
A comprehensive approach which includes both creation of the simulation environment and generation of the test cases is presented for multiprocessor verification of PowerPC 620 at the functional model level
Keywords :
automatic test software; cache storage; computer architecture; computer testing; formal verification; integrated circuit testing; logic testing; performance evaluation; reduced instruction set computing; virtual machines; L2 SRAM model; PowerPC 620; RISC microprocessor; RTX simulation executor; alternate master; arbiter model; behavioral models; bus interface unit; cache coherency; coherency monitor; configuration parameters file; configuration testing; data colouring; functional model level; implementation verification program; memory model; multiprocessor verification strategy; random test program generator; simulation environment; test case generation; Automatic programming; Computer bugs; Debugging; Delay; Microprocessors; Out of order; Power generation; Protocols; Reduced instruction set computing; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-2992-9
Type :
conf
DOI :
10.1109/TEST.1995.529830
Filename :
529830
Link To Document :
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