Scalability and RF performance of nanoscale dopant segregated Schottky barrier SOI MOSFET

In this paper the effect of dopant segregation length (L_DSL) on scalability and radio frequency (RF) performance of dopant segregated Schottky barrier (DSSB) silicon-on-insulator (SOI) MOSFET is investigated in sub-30nm regime using two dimensional MEDICI simulator. The range of L_DSL used in this study is selected in such a way that both Gate - Source/Drain (G-S/D) underlap and G-S/D overlap structures can be analysed. It is found that DSSB SOI MOSFET with G-S/D underlap structure is highly scalable and fulfills the I_ON, I_OFF and saturation threshold voltage (V_TSAT) requirements of ITRS -2009 high performance (HP) logic technology nodes. However, the RF performance of this structure deteriorates significantly mainly because of reduction in transconductance (G_m). On the other hand the G-S/D overlap structure shows promising RF performance.