DocumentCode :
2048683
Title :
A quantitative study of the benefits of area-I/O in FPGAs
Author :
Van Marck, Herwig ; Depreitere, Jo ; Stroobandt, Dirk ; Van Campenhout, Jan
Author_Institution :
Electron. & Inf. Syst., Ghent Univ., Belgium
fYear :
1998
fDate :
19-21 Feb 1998
Firstpage :
392
Lastpage :
399
Abstract :
Designs targeted for FPGAs are becoming increasingly larger and more complex. The need for I/O often surpasses the number of I/O pads that can be provided at the perimeter of the FPGA chip. As a result, these designs have to be implemented in larger FPGAs, the size of which is fired by the number of I/O pads and not by the logic needed, reducing the performance of the implementation. Providing FPGA chips with I/O pads that are spread out across the whole chip area drastically reduces this problem. In this paper, we present a quantitative analysis of the impact of area-I/O in FPGAs
Keywords :
field programmable gate arrays; integrated circuit design; integrated circuit interconnections; multichip modules; network routing; FPGAs; I/O pads; MCMs; area-I/O; chip area; quantitative analysis; Digital circuits; Fabrication; Field programmable gate arrays; Hip; Information systems; Logic arrays; Logic design; Routing; Switches; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location :
Lafayette, LA
ISSN :
1066-1395
Print_ISBN :
0-8186-8409-7
Type :
conf
DOI :
10.1109/GLSV.1998.665331
Filename :
665331
Link To Document :
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