DocumentCode
2049466
Title
Integrating parallel processes in CMOS photodetector chip
Author
Garcia-Lamont, Jair ; Flores-Nava, L.M. ; Gomez-Castaneda, F. ; Moreno-Cadenas, Jose A.
Author_Institution
Centre for Res. & Adv. Studies, Nat. Polytech. Inst. of Mexico, Mexico City, Mexico
Volume
2
fYear
1999
fDate
1999
Firstpage
576
Abstract
In this work we show that the parallel functions of edge detection and classification for an image detector can be integrated in a CMOS silicon chip as an extension of early research reported by different authors that employ neural models. The resulting system is possible due to analog current-mode techniques that reduce architecture complexity
Keywords
CMOS analogue integrated circuits; CMOS image sensors; analogue processing circuits; current-mode circuits; edge detection; image classification; image processing equipment; integrated optoelectronics; neural chips; photodetectors; phototransistors; CMOS Si chip; CMOS photodetector chip; analog current-mode techniques; architecture complexity; classification; edge detection; image detector; neural models; CMOS process; Circuit testing; Computer architecture; Joining processes; Mirrors; Parallel algorithms; Photodetectors; Phototransistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Information Processing, 1999. Proceedings. ICONIP '99. 6th International Conference on
Conference_Location
Perth, WA
Print_ISBN
0-7803-5871-6
Type
conf
DOI
10.1109/ICONIP.1999.845658
Filename
845658
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