• DocumentCode
    2049846
  • Title

    A 36-chip multiprocessor multichip module made with the General Electric high density interconnect technology

  • Author

    Gdula, M. ; Welles, KB, II ; Wojnarowski, RJ ; Neugebauer, CA ; Burgess, JF

  • Author_Institution
    General Electric Corp. Res. & Dev. Center, Schenectady, NY, USA
  • fYear
    1991
  • fDate
    11-16 May 1991
  • Firstpage
    727
  • Lastpage
    730
  • Abstract
    A unique packaging and interconnect technology was used to build a multichip, four-CPU-element, pipeline parallel processing computer module using Texas Instruments TMS320C25 digital signal processors and companion circuits. The technology allowed a greater than fifteen-fold reduction in area over conventional chip packages mounted with printed circuit board methods. Reduced interconnect capacitance coupled with elimination of conventional package parasitics allowed clocking of commercial 40 MHz parts to nearly 90 MHz
  • Keywords
    digital signal processing chips; hybrid integrated circuits; modules; packaging; parallel architectures; General Electric high density interconnect technology; TMS320C25; Texas Instruments; area; clocking; digital signal processors; interconnect capacitance; multiprocessor multichip module; packaging; pipeline parallel processing computer module; Concurrent computing; Digital signal processors; Instruments; Integrated circuit interconnections; Multichip modules; Packaging; Parallel processing; Parasitic capacitance; Pipelines; Printed circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1991. Proceedings., 41st
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-0012-2
  • Type

    conf

  • DOI
    10.1109/ECTC.1991.163960
  • Filename
    163960