DocumentCode
2050438
Title
VHDL-based EDA tool implementation with Java
Author
Miller, R.
Author_Institution
Structural Dynamics Res. Corp., Milford, OH, USA
fYear
1998
fDate
19-21 Feb 1998
Firstpage
440
Lastpage
445
Abstract
As part of ARPA´s RASSP technology program, we developed a hardware/software cosynthesis algorithm that was prototyped in C++. This initial prototype was developed in C++ using PCCTS, Tcl, Tcl/TK, and Tcl-DP. When this environment became unwieldy due to changing hardware development platforms and software packages, a second prototype was built in Java. This paper describes architectural features of the prototype and how they were addressed in Java
Keywords
C language; hardware description languages; high level synthesis; software packages; C++ language; Java; PCCTS; RASSP technology program; Tcl; Tcl-DP; Tcl/TK; VHDL-based EDA tool; hardware development platforms; hardware/software cosynthesis algorithm; software packages; Algorithm design and analysis; Application software; Databases; Electronic design automation and methodology; Hardware; Java; Packaging; Prototypes; Software algorithms; Software packages; Software prototyping; Software tools;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 1998. Proceedings of the 8th Great Lakes Symposium on
Conference_Location
Lafayette, LA
ISSN
1066-1395
Print_ISBN
0-8186-8409-7
Type
conf
DOI
10.1109/GLSV.1998.665340
Filename
665340
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