• DocumentCode
    2051176
  • Title

    Circuit failure prediction for robust system design in scaled CMOS

  • Author

    Mitra, Subhasish

  • Author_Institution
    Depts. of Electr. Eng. & Comput. Sci., Stanford Univ., Stanford, CA
  • fYear
    2008
  • fDate
    April 27 2008-May 1 2008
  • Firstpage
    524
  • Lastpage
    531
  • Abstract
    The idea behind circuit failure prediction is to predict the occurrence of a circuit failure before errors actually appear in system data and states. This concept enables a sea change in robust system design by overcoming major reliability challenges such as circuit aging and early-life failures (infant mortality).
  • Keywords
    integrated circuit reliability; integrated circuit testing; circuit aging; circuit failure prediction; early-life failures; infant mortality; robust system design; Aging; Built-in self-test; Costs; Error correction; Hardware; Integrated circuit interconnections; Logic; Niobium compounds; Power system interconnection; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2008. IRPS 2008. IEEE International
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    978-1-4244-2049-0
  • Electronic_ISBN
    978-1-4244-2050-6
  • Type

    conf

  • DOI
    10.1109/RELPHY.2008.4558940
  • Filename
    4558940
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2051176