DocumentCode
2051194
Title
On-Chip circuit for monitoring frequency degradation due to NBTI
Author
Stawiasz, Kevin ; Jenkins, Keith A. ; Lu, Pong-Fei
Author_Institution
IBM T.J. Watson Res. Center, Yorktown Heights, NY
fYear
2008
fDate
April 27 2008-May 1 2008
Firstpage
532
Lastpage
535
Abstract
This work describes the design and characterization of a unique circuit which can be easily integrated into a microprocessor product in order to determine the degradation of circuit speed caused by negative bias temperature instability (NBTI)-induced shifts under typical product operating voltage and temperature. These data can subsequently be compared to models for circuit degradation in order to assess the validity of the models.
Keywords
CMOS integrated circuits; circuit stability; microprocessor chips; circuit speed degradation; microprocessor product; negative bias temperature instability; product operating temperature; product operating voltage; Circuit testing; Counting circuits; Degradation; Frequency; Monitoring; Niobium compounds; Ring oscillators; Stress; Titanium compounds; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2008. IRPS 2008. IEEE International
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4244-2049-0
Electronic_ISBN
978-1-4244-2050-6
Type
conf
DOI
10.1109/RELPHY.2008.4558941
Filename
4558941
Link To Document