DocumentCode
2051669
Title
Analysis of an algorithm for irregular LDPC code construction
Author
Ramamoorthy, Aditya ; Wesel, Richard D.
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear
2004
fDate
27 June-2 July 2004
Firstpage
69
Abstract
This work presents a rigorous analysis of an algorithm proposed by Tian et al. (2003) for the construction of irregular LDPC codes with reduced stopping sets and low error floors. Computation of the expected number of stopping sets of a given size proves that the algorithm significantly outperforms a random construction. We show that the algorithm provably reduces the expected number of stopping sets up to a certain size (based on the input parameters). The expected number of cycles of a given size is computed for both constructions.
Keywords
parity check codes; error floor; irregular LDPC code construction; stopping set; AWGN channels; Algorithm design and analysis; Floors; Instruments; Parity check codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory, 2004. ISIT 2004. Proceedings. International Symposium on
Print_ISBN
0-7803-8280-3
Type
conf
DOI
10.1109/ISIT.2004.1365107
Filename
1365107
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