Fabrication process controlled pre-existing and charge - discharge effect of hole traps in NBTI of high-k / metal gate pMOSFET

Author

Sato, M. ; Tamura, C. ; Yamabe, K. ; Shiraishi, K. ; Yamada, K. ; Hasunuma, R. ; Aoyama, T. ; Nara, Y. ; Ohji, Y.

Author_Institution

Semicond. Leading Edge Technol., Inc., Tsukuba

fYear

2008

fDate

April 27 2008-May 1 2008

Firstpage

655

Lastpage

656

Abstract

This study aims to investigate the application of a technique to separate bulk hole trap effects from interface state degradation in NBTI to understand hole traps behavior including MOSFET fabrication process dependence. A gate last process is used to fabricate the pMOSFETs with HfSiON/TiN gate stacks. Results show that RTA is an effective method for reducing pre-existing hole traps, while nitridation is effective in the thermally de-activation of hole traps. The hole traps, which are thought to be due to the negatively charged interstitial oxygen, increase logarithmically with hole injection.

Keywords

hafnium compounds; high-k dielectric thin films; hole traps; interface states; interstitials; nitridation; power MOSFET; rapid thermal annealing; titanium compounds; HfSiON-TiN; RTA; charge-discharge effect; gate last process; gate stacks; hole injection; hole traps; interface state degradation; negatively charged interstitial oxygen; nitridation; pMOSFET; Fabrication; High K dielectric materials; High-K gate dielectrics; Interface states; MOSFET circuits; Niobium compounds; Process control; Thermal degradation; Tin; Titanium compounds;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2008. IRPS 2008. IEEE International

Conference_Location

Phoenix, AZ

Print_ISBN

978-1-4244-2049-0

Electronic_ISBN

978-1-4244-2050-6

Type

conf

DOI

10.1109/RELPHY.2008.4558973

Filename

4558973