DocumentCode
2051955
Title
3–10GHz CMOS distributed amplifier low-power and low-noise and high-gain low noise amplifier for UWB systems
Author
Chen, I-Chuan ; Yang, Jeng-Rern
Author_Institution
Dept. of Commun. Eng., Yuan Ze Univ., Jhongli, Taiwan
fYear
2010
fDate
21-24 Nov. 2010
Firstpage
2045
Lastpage
2047
Abstract
This study presents a 3-10GHz ultra-wideband low-noise amplifier (UWB LNA) with CMOS distributed amplification,(DA) featuring low power consumption, flat response, high gain (S21), and low noise figure (NF). The DA UWB LNA is designed with standard 0.18μm CMOS technology. Low power consumption, flat and high gain (S21) were achieved through the use of a proposed two stage DA, and current-reused technique with a peaking inductor. An RL terminating network for the gate transmission line, and an under-damped Q-factor for second-order NF frequency response achieved a flat response and, low noise figure (NF). The LNA achieved S21 of 19.8±1.2 dB and an average NF of 3.4±0.36 dB with power dissipation (PD) of only 14.8 mW.
Keywords
CMOS integrated circuits; MMIC amplifiers; Q-factor; distributed amplifiers; field effect MMIC; low noise amplifiers; low-power electronics; ultra wideband technology; CMOS distributed amplifier; UWB LNA; frequency 3 GHz to 10 GHz; gate transmission line; high-gain low noise amplifier; low power consumption; peaking inductor; size 0.18 mum; ultrawideband low-noise amplifier; under-damped Q-factor; distributed amplifier (DA); low noise amplifier (LNA); ultra-wideband (UWB);
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location
Fukuoka
ISSN
pending
Print_ISBN
978-1-4244-6889-8
Type
conf
DOI
10.1109/TENCON.2010.5686578
Filename
5686578
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