Title :
Secure Split-Test for preventing IC piracy by untrusted foundry and assembly
Author :
Contreras, Gustavo K. ; Rahman, M.T. ; Tehranipoor, Mohammad
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT, USA
Abstract :
Counterfeit ICs can have a major impact on the security and reliability of critical applications. This paper presents a method called Secure Split-Test (SST) for securing the manufacturing process to prevent counterfeits, allowing intellectual property (IP) owners to protect and meter their IPs. This is done by requiring test results to be verified by the IP owner and by requiring the IP owner to provide a “key” to unlock the IPs correct functionality. The results and analysis demonstrate that SST can effectively prevent counterfeited ICs from untrusted foundries or assemblies as well as its resilience to attacks and circumvention.
Keywords :
assembling; industrial property; integrated circuit manufacture; integrated circuit testing; manufacturing processes; security; IC piracy prevention; SST; assembly; counterfeit ICs; critical application reliability; critical application security; intellectual property; manufacturing process security; secure split-test; untrusted foundry; Assembly; Cryptography; Foundries; IP networks; Integrated circuits; Logic gates; Servers; Counterfeit ICs; IP piracy; IP protection; supply chain; untrusted foundry and assembly;
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location :
New York City, NY
Print_ISBN :
978-1-4799-1583-5
DOI :
10.1109/DFT.2013.6653606
