• DocumentCode
    2052687
  • Title

    Implementation of an integrated FPGA based automatic test equipment and test generation for digital circuits

  • Author

    Vanitha, K. ; Sathiya Moorthy, C.A.

  • Author_Institution
    Arunai Coll. of Eng., Tiruvannamalai, India
  • fYear
    2013
  • fDate
    21-22 Feb. 2013
  • Firstpage
    741
  • Lastpage
    746
  • Abstract
    The VLSI circuit manufacturers cannot guarantee defect-free integrated circuits (IC´s). Circuit complexity, IC defect anomalies, and economic considerations prevent complete validation of VLSI circuits. The aim is to present the integrated automatic test equipment/generation System for digital circuits. The test generation is developed using device behavior and its based on Behavior-Based Automatic Test Generation (BBATG) technique. A behavior of a device is a set of functions with timing relations on its in/out pins. Automatic test Equipment which is the vital part of electronics test scene today provides the complete set of test executing software and test supporting hardware for the ATE which can use the BBATG generated test data directly to detect behavior faults and diagnose faults at the device level for digital circuits. The low cost, versatile and reconfigurable FPGA-based ATE is implemented called FATE to support in ASIC development phase. This provides the ideal solution for engineers to develop test programs and perform device tests and yield analysis on their desktop and then transfer the test program directly to production. Thus it could able to execute a preliminary digital test, using just a Laptop and an FPGA- board.
  • Keywords
    VLSI; application specific integrated circuits; automatic test equipment; automatic test pattern generation; automatic test software; digital integrated circuits; field programmable gate arrays; ASIC development phase; ATE; BBATG technique; IC defect anomalies; VLSI circuit; behavior-based automatic test generation technique; circuit complexity; defect-free integrated circuits; digital circuits; economic considerations; electronics test scene; integrated FPGA based automatic test equipment; supporting hardware; test executing software; test generation; Circuit faults; Field programmable gate arrays; Integrated circuit modeling; Libraries; Printed circuits; Software; Testing; Automatic Test Equipment (ATE); Behaviour Fault Model; Detect Test; Diagnosis Test; FPGA; Test Generation; VLSI Digital Circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Communication and Embedded Systems (ICICES), 2013 International Conference on
  • Conference_Location
    Chennai
  • Print_ISBN
    978-1-4673-5786-9
  • Type

    conf

  • DOI
    10.1109/ICICES.2013.6508284
  • Filename
    6508284