DocumentCode :
2052696
Title :
High-speed and low-latency decoding of Reed-Solomon codes
Author :
Kang, Hyeong-Ju ; Park, In-Cheol
Author_Institution :
Dept. of Electron. Eng. & Comput. Sci., KAIST, Daejeon, South Korea
fYear :
2002
fDate :
2002
Firstpage :
87
Abstract :
This paper presents a new decoding structure of Reed-Solomon (RS) codes. To achieve both short latency and fast operation, the summation of the products of syndromes is eliminated and the difference used to calculate the error locator polynomial is incrementally updated. The proposed structure called a dual-line structure can operate as fast as the serial structure and has a latency as short the parallel structure.
Keywords :
Reed-Solomon codes; decoding; error correction codes; polynomials; Reed-Solomon codes; dual-line structure; error locator polynomial; high-speed decoding; low-latency decoding; DVD; Delay; Equations; Error correction; Error correction codes; Hardware; Iterative decoding; Polynomials; Power engineering and energy; Reed-Solomon codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory, 2002. Proceedings. 2002 IEEE International Symposium on
Print_ISBN :
0-7803-7501-7
Type :
conf
DOI :
10.1109/ISIT.2002.1023359
Filename :
1023359
Link To Document :
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