• DocumentCode
    2052698
  • Title

    An iterative calculation method of neuron model with sigmoid function

  • Author

    Chujo, Naoya ; Kuroyanagi, Susumu ; Doki, Shinji ; Okuma, Shigeru

  • Author_Institution
    Toyota Central R&D Labs. Inc., Aichi, Japan
  • Volume
    3
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    1532
  • Abstract
    Neural network hardware is necessary for demanding real-time applications such as pattern recognition. In the paper, an improved calculation algorithm of the neuron model with sigmoid function is proposed, which is suitable for hardware implementation. The algorithm is based on the multi dimensional binary search. The neuron circuits implemented on FPGA by the proposed algorithm have shown excellence in size and circuit frequency compared with the conventional circuits with sum of product operation
  • Keywords
    field programmable gate arrays; iterative methods; neural chips; FPGA; circuit frequency; iterative calculation method; multi dimensional binary search; neuron model; sigmoid function; Artificial neural networks; Circuits; Field programmable gate arrays; Frequency; Iterative methods; Multi-layer neural network; Neural network hardware; Neurons; Pattern recognition; Research and development;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Systems, Man, and Cybernetics, 2001 IEEE International Conference on
  • Conference_Location
    Tucson, AZ
  • ISSN
    1062-922X
  • Print_ISBN
    0-7803-7087-2
  • Type

    conf

  • DOI
    10.1109/ICSMC.2001.973501
  • Filename
    973501