• DocumentCode
    2052703
  • Title

    Differential analysis of Round-Reduced AES faulty ciphertexts

  • Author

    Mirbaha, Amir-Pasha ; Dutertre, J.-M. ; Tria, Assia

  • Author_Institution
    Secure Syst. & Archit. (SAS) Dept., Ecole Nat. Super. des Mines de St.- Etienne, Gardanne, France
  • fYear
    2013
  • fDate
    2-4 Oct. 2013
  • Firstpage
    204
  • Lastpage
    211
  • Abstract
    This paper describes new Round Reduction analysis attacks on an Advanced Encryption Standard (AES) implementation by laser fault injection. The previous round reduction attacks require both of spatial and temporal accuracies in order to execute only one, two or nine rounds. We present new attacks by more flexible fault injection conditions. Our experiments are carried out on an 8-bit microcontroller which embeds a software AES with pre-calculated round keys. Faults are injected either into the round counter itself or into the reference of its total round number. The attacks may result to the use of a faulty round key at the last one or two executed rounds. The cryptanalysis of the obtained round-reduced faulty ciphertexts resorts to the differentiation techniques used by Differential Fault Analysis.
  • Keywords
    cryptography; fault diagnosis; microcontrollers; advanced encryption standard; cryptanalysis; differential fault analysis; differentiation techniques; laser fault injection; microcontroller; pre-calculated round keys; round reduction analysis; round-reduced AES faulty ciphertexts; word length 8 bit; Algorithm design and analysis; Encryption; Indexes; Radiation detectors; Software; Software algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
  • Conference_Location
    New York City, NY
  • ISSN
    1550-5774
  • Print_ISBN
    978-1-4799-1583-5
  • Type

    conf

  • DOI
    10.1109/DFT.2013.6653607
  • Filename
    6653607