Title :
A class of random multiple bits within a byte error correcting codes with single byte error detecting capability for memory systems
Author :
Umanesan, Ganesan ; Fujiwara, Eiji
Author_Institution :
Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan
Abstract :
We propose a class of codes called single t-bits within a b-bit byte error correcting-single b-bit byte error detecting (Stb/EC-SbED) code for high speed semiconductor memory systems.
Keywords :
DRAM chips; error correction codes; error detection codes; integrated memory circuits; Stb/EC-SbED code; byte error correcting codes; high speed semiconductor memory systems; random multiple bits; single byte error detecting capability; single t-bits within b-bit byte error correcting-single b-bit byte error detecting code; Computer errors; Electromagnetic scattering; Error correction; Error correction codes; Hydrogen; Information science; Null space; Parity check codes; Random access memory; Semiconductor memory;
Conference_Titel :
Information Theory, 2002. Proceedings. 2002 IEEE International Symposium on
Print_ISBN :
0-7803-7501-7
DOI :
10.1109/ISIT.2002.1023391