DocumentCode
2053815
Title
An enhanced folded cascode OTA with push pull input stage
Author
Kumaravel, S. ; Venkataramani, B. ; Rishi, S. ; Vijay, V. Sri ; Shailendra, B.
Author_Institution
ECE, NIT, Tiruchirappalli, India
fYear
2012
fDate
20-23 March 2012
Firstpage
1
Lastpage
6
Abstract
In this paper, a push pull configuration is proposed for the input stage of a folded cascode operational transconductance amplifier for enhancement of both gain and unity gain bandwidth. The proposed OTA and the conventional folded cascode OTA reported in the literature are implemented in UMC 0.18μm CMOS process and studied through simulation. From this, it is found that the proposed OTA has about 3dB higher gain and 100% higher unity gain bandwidth compared to the conventional OTA for same load and power consumption. This is achieved at the cost of reduction in the input common mode range by one threshold voltage VTH. The proposed OTA can be used for designing high speed ADCs.
Keywords
CMOS analogue integrated circuits; differential amplifiers; operational amplifiers; power consumption; CMOS process; UMC; conventional folded cascode OTA; enhanced folded cascode OTA; folded cascode operational transconductance amplifier; high speed ADC; power consumption; push pull configuration; push pull input stage; unity gain bandwidth; Bandwidth; Feedback circuits; Gain; Layout; Power demand; Transconductance; Transistors; Folded Cascode OTA; Gain enhancement; UGB enhancement;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Signals and Devices (SSD), 2012 9th International Multi-Conference on
Conference_Location
Chemnitz
Print_ISBN
978-1-4673-1590-6
Electronic_ISBN
978-1-4673-1589-0
Type
conf
DOI
10.1109/SSD.2012.6197983
Filename
6197983
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