• DocumentCode
    2054094
  • Title

    Early-Stage Operation-Skipping Scheme for Low-Power Stochastic Image Processors

  • Author

    Katagiri, Daisaku ; Onizawa, Naoya ; Hanyu, Takahiro

  • Author_Institution
    Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
  • fYear
    2015
  • fDate
    18-20 May 2015
  • Firstpage
    109
  • Lastpage
    114
  • Abstract
    Stochastic computation that performs in probabilistic domain has been recently exploited for area-efficient hardware implementation, while it requires large number of bits to represent probabilities, increasing the switching activity and hence power dissipation. In this paper, an early-stage operation-skipping scheme, where stochastic computation is terminated at the early stage by monitoring the intermediate computation result, is introduced for low-power stochastic image processors. In case that the proposed scheme is applied in edge-detection processing as a typical example of image processing, a non-candidate pixel is predicted using a simple threshold detector before the completion of the stochastic edge-detection process. Once the pixel is found, the edge-detection process is stopped, eliminating the stochastic computation at the rest of bits. As a design example, a Robert´s operator based stochastic edge detector is implemented using MATLAB. Based on the simulation results, a correlation between an output-image quality using a peak signal-to-noise ratio (PSNR) criteria and the reduction ratio of bits is discussed.
  • Keywords
    edge detection; microprocessor chips; power aware computing; stochastic processes; MATLAB; PSNR criteria; Roberts operator; bits reduction ratio; early-stage operation-skipping scheme; low-power stochastic image processors; output-image quality; peak signal-to-noise ratio; stochastic edge detector; stochastic edge-detection process; threshold detector; Clocks; Computer architecture; Detectors; Generators; Image edge detection; Program processors; Radiation detectors; early stopping; image processor; stochastic computation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic (ISMVL), 2015 IEEE International Symposium on
  • Conference_Location
    Waterloo, ON
  • ISSN
    0195-623X
  • Type

    conf

  • DOI
    10.1109/ISMVL.2015.28
  • Filename
    7238142