DocumentCode :
2055360
Title :
Study on the costs of on-site VLSI testing
Author :
Hirase, Junichi
Author_Institution :
Matsushita Electron. Corp., Japan
fYear :
1995
fDate :
21-25 Oct 1995
Firstpage :
438
Lastpage :
443
Abstract :
The most important points concerning the manufacturing testing of VLSI are (1) The guaranteed high quality of the testing itself, (2) Low cost testing procedures and (3) Fast development and operation. However, together with the high integration of VLSI, recent large-scale, multi-functional and complex technology has made the above testing procedures more and more difficult to secure. Our section is in charge of the establishment of the manufacturing testing procedures for all MOS-VLSI, excluding stand-alone MOS memory, and of the management of the technological data of all tests. In this paper, we will analyze this data and disclose the results of our study concerning testing costs. In particular, we will discuss the actual necessity of introducing test circuits in regard to the testing costs, and how to obtain the appropriate value for such circuits
Keywords :
MOS integrated circuits; VLSI; automatic testing; boundary scan testing; costing; integrated circuit testing; integrated circuit yield; production testing; MOS VLSI; developmental cost; direct costs; full scan design; indirect costs; manufacturing testing; on-site VLSI testing; partial scan design; sort costs; test circuits; testing costs; Circuit testing; Costs; Electronic equipment testing; Manufacturing processes; Marketing and sales; Semiconductor device manufacture; Semiconductor device testing; System testing; Test equipment; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-2992-9
Type :
conf
DOI :
10.1109/TEST.1995.529870
Filename :
529870
Link To Document :
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