Title :
A unique methodology for at-speed test of cDSPTM and ASIC devices
Author :
Potts, David ; Griesmer, Roger
Author_Institution :
Texas Instrum. Inc., Stafford, TX, USA
Abstract :
This paper presents a new design to test methodology used to create at-speed system tests for complex integrated circuits. The unique approach discussed in this paper has been termed TADJUST, for Timing ADJUSTment, and offers a solution which enables the creation of robust at speed functional tests. The Tadjust approach provides a method for improving at-speed testability by using multiple dynamic timing references in the design to test flow. The at-speed testability problems, Tadjust concept, and supporting results from a cDSP(TM) design are discussed
Keywords :
application specific integrated circuits; automatic test software; automatic testing; design for testability; digital signal processing chips; fault diagnosis; formal verification; integrated circuit testing; logic testing; program verification; timing; ASIC devices; TADJUST; at-speed system tests; at-speed testability; complex integrated circuits; custom DSP devices; delay faults; design to test methodology; design verification; multiple dynamic timing references; proof of concept; robust at speed functional tests; software verification; test vector generation; timing adjustment; Application specific integrated circuits; Circuit faults; Circuit testing; Delay; Design methodology; Fault detection; Instruments; Integrated circuit testing; System testing; Timing;
Conference_Titel :
Test Conference, 1996. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3541-4
DOI :
10.1109/TEST.1996.557128
