Operation of Three- and Five-phase Diode-clamped Three-level Inverters under Open-circuit Fault Conditions

The objective of this paper is to investigate the operation of three-level 3-phase and 5-phase inverter systems. Particularly, the effect of open-circuit phase failures on the capacitor voltage variation and the impact that the failures have on post-fault phase currents. The paper considers single phase failures in the 3-phase system, and single- and double-phase failures in the 5-phase system. Double-phase failures include both adjacent and non-adjacent phase failures. Simulation and practical experimentation are reported assuming the same DC link capacitance and the same total power output and power factor. Symmetrical Regular Sampled Phase Disposition PWM (SRSPDPWM) is employed to generate the PWM signals for the inverter using an Altera Cyclone FPGA. A 3-level 5-phase NPC inverter based on Power MOSFETs is used to compare the cyclic voltage variation of the 3-level 3-phase system with that of the 3-level 5-phase system.