Finding defects with fault models

Author

Aitken, Robert C.

Author_Institution

Design Technol. Centre, Hewlett-Packard Co., Palo Alto, CA, USA

fYear

1995

fDate

21-25 Oct 1995

Firstpage

498

Lastpage

505

Abstract

A process is presented to validate fault models used in fault diagnosis. Known defects are inserted, using a focused ion beam (FIB), into production ICs and their behavior is compared to that predicted in fault simulation. The fault model is refined until it matches the observed defect behavior. The process is then repeated with known defects in unknown (“blind”) locations, and necessary modifications to the model are again made. Finally, the model is used to diagnose chips with unknown defects. Experimental results on several chips demonstrate the value of the approach, which can be extended to test pattern generation and test quality estimation as well as fault diagnosis

Keywords

automatic testing; fault diagnosis; focused ion beam technology; integrated circuit testing; logic testing; production testing; ATPG; IC testing; blind locations; fault diagnosis; fault models; fault simulation; focused ion beam; known defects; observed defect behavior; production ICs; test pattern generation; test quality estimation; unknown defects; Automatic test pattern generation; Circuit faults; Extrapolation; Failure analysis; Fault diagnosis; Integrated circuit testing; Ion beams; Predictive models; Production; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1995. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-2992-9

Type

conf

DOI

10.1109/TEST.1995.529877

Filename

529877