DocumentCode
2057663
Title
4.2V Tolerant Buck Converter in a Standard 3.3V 0.13μm CMOS Technology
Author
Rocha, Jose ; Santos, Marcelino ; Costa, J. M Dores ; Lima, Floriberto
Author_Institution
Instituto Superior de Engenharia, de Lisboa (ISEL). jrocha@deetc.isel.ipl.pt
fYear
2007
fDate
12-14 April 2007
Firstpage
429
Lastpage
434
Abstract
In this paper the design of integrated buck converters, tolerant to supply voltages higher than the process limit for individual CMOS transistors, is presented. In particular, the topologies for the level shifters and the power block are analyzed. Different driving solutions for a general circuit topology that use cascoded transistors in the output stage and can tolerate nearly twice the process voltage limit are discussed. A buck converter core incorporating an optimized usage of this power block and a modified version of a conventional voltage shifter was designed in a standard 3.3V, 0.13μm CMOS process. The converter is powered by a lithium-ion battery with a voltage range from 2.7V to 4.2V, and can deliver an output current up to 100mA with a programmable output voltage from 0.6V to 2.0V, with up to 90% efriciency. A methodology is presented for verification of high voltage compatibility of circuits design using low voltage technologies.
Keywords
Batteries; Breakdown voltage; Buck converters; CMOS process; CMOS technology; Circuit topology; Integrated circuit reliability; Low voltage; Phasor measurement units; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Engineering, Energy and Electrical Drives, 2007. POWERENG 2007. International Conference on
Conference_Location
Setubal, Portugal
Print_ISBN
978-1-4244-0894-8
Electronic_ISBN
978-1-4244-0895-5
Type
conf
DOI
10.1109/POWERENG.2007.4380187
Filename
4380187
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