• DocumentCode
    2058132
  • Title

    On the use of compressed DFAs for packet classification

  • Author

    Antichi, Gianni ; Di Pietro, Andrea ; Giordano, Stefano ; Procissi, Gregorio ; Ficara, Domenico ; Vitucci, Fabio

  • Author_Institution
    Dept. of Inf. Eng., Univ. of Pisa, Pisa, Italy
  • fYear
    2010
  • fDate
    3-4 Dec. 2010
  • Firstpage
    21
  • Lastpage
    25
  • Abstract
    The process of categorizing packets into flows in an Internet router is called packet classification. All packets belonging to the same flow obey a predefined rule and are processed in a similar manner by the router itself. For example, all packets with the same destination IP address and protocol may be defined as a flow. Packet classification is the foundation of many Internet functions such as Quality of Service enforcement, monitoring applications, security, and so on. This paper presents a novel classification scheme designed for NetFPGA boards which takes advantage of a very compressed version of Deterministic Finite Automata (DFA) in order to process packets at line rate.
  • Keywords
    Internet; field programmable gate arrays; finite automata; logic design; telecommunication network routing; IP address; Internet functions; Internet router; NetFPGA boards; compressed DFA; deterministic finite automata; packet classification; Automata; Doped fiber amplifiers; Hardware; IP networks; Memory management; Random access memory; Routing protocols; Finite Automata; Packet Classification; Programmable Hardware; Regular Expressions;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Modeling, Analysis and Design of Communication Links and Networks (CAMAD), 2010 15th IEEE International Workshop on
  • Conference_Location
    Miami, FL
  • Print_ISBN
    978-1-4244-7634-3
  • Electronic_ISBN
    978-1-4244-7633-6
  • Type

    conf

  • DOI
    10.1109/CAMAD.2010.5686971
  • Filename
    5686971