Title :
Single-electron transistor using self-aligned sidewall spacer gates on silicon-on-insulator nanowire
Author :
Hu, S.F. ; Wu, Y.C. ; Sung, C.L. ; Chang, C.Y. ; Huang, T.Y.
Author_Institution :
Nat. Nano Device Lab., Hsinchu, Taiwan
Abstract :
A dual-gate-controlled single-electron transistor was fabricated by using self-aligned polysilicon sidewall spacer gates on a silicon-on-insulator nanowire. The quantum dot formed by the electric field effect of the dual-gate structure was miniaturized to smaller than the state-of-the-art feature size, through a combination of electron beam lithography, oxidation and polysilicon sidewall spacer gate formation processes. The device shows typical MOSFET I-V characteristics at room temperature. However, the Coulomb gap and Coulomb oscillations are clearly observed at 4 K.
Keywords :
Coulomb blockade; current fluctuations; electron beam lithography; nanowires; oxidation; quantum well devices; semiconductor quantum dots; silicon-on-insulator; single electron transistors; 293 to 298 K; 4 K; Coulomb gap; Coulomb oscillations; MOSFET I-V characteristics; Si; dual gate controlled single electron transistor; dual-gate structure; electric field effect; electron beam lithography; oxidation; polysilicon sidewall spacer gate formation; quantum dot; room temperature; self aligned polysilicon sidewall spacer gates; silicon-on-insulator nanowire; Electron beams; Lithography; Nanoscale devices; Oxidation; Quantum dots; Silicon on insulator technology; Single electron transistors; Size control; Temperature; Wires;
Conference_Titel :
Nanotechnology, 2003. IEEE-NANO 2003. 2003 Third IEEE Conference on
Print_ISBN :
0-7803-7976-4
DOI :
10.1109/NANO.2003.1230975