DocumentCode :
2059625
Title :
ΔIDDQ testing of a 12-bit recycling architecture based ADC
Author :
Yellampalli, Siva S. ; Srivastava, Ashok
Author_Institution :
Louisiana State Univ., Baton Rouge
fYear :
2007
fDate :
20-22 April 2007
Firstpage :
370
Lastpage :
373
Abstract :
In this paper, we present a built-in current sensor (BICS) for ΔIDDQ based testing that takes into account increased background current of defect-free circuits. A 12-bit recycling architecture based analog-to-digital converter (ADC), designed for operation at 2.5 V in 0.5 μm n-well CMOS process has been used as the CUT.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; computer architecture; integrated circuit testing; logic design; logic testing; sensors; ΔIDDQ testing; 12-bit recycling architecture; ADC; CMOS process; CUT; analog-to-digital converter; built-in current sensor; circuit under test; defect-free circuits; size 0.5 μm; voltage 2.5 V; Analog-digital conversion; Circuit testing; Clocks; Computer architecture; Electrical fault detection; Recycling; Semiconductor device measurement; Switches; Switching circuits; Voltage; ΔIDDQ testing; ADC testing; CMOS ADC; faults;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Region 5 Technical Conference, 2007 IEEE
Conference_Location :
Fayetteville, AR
Print_ISBN :
978-1-4244-1279-2
Electronic_ISBN :
978-1-4244-1280-8
Type :
conf
DOI :
10.1109/TPSD.2007.4380337
Filename :
4380337
Link To Document :
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