DocumentCode :
2059696
Title :
1.2 The future of IC design innovation
Author :
Sutardja, Sehat
Author_Institution :
Marvell Technol. Group, Santa Clara, CA, USA
fYear :
2015
fDate :
22-26 Feb. 2015
Firstpage :
1
Lastpage :
6
Abstract :
One of the greatest achievements of human kind is undoubtedly its ability to build tiny machines that marry the functionalities of computers and wireless communication devices so cheaply that almost anyone in the world can afford them. Every one of us carries, at least, one such device in our pocket, yet we rarely think how in the world anyone could have created such a thing! Even the experts in our industry could not have predicted that this would have happened so quickly. What we have achieved in the course of the design and implementation of these sophisticated systems could be considered nothing short of a miracle, considering that billions of transistors have to work together flawlessly. (Well, sort of!) The reality is that some of these devices are now so complex that we need thousands of engineers to design, validate, and support them, including recovery from inefficiencies and bugs along the way. But, despite their ever-increasing complexity, the way we build these devices has not changed much over the past decades. Integrated-circuit (IC) design engineers blindly do what they are told - integrate as much functionality into a single device, believing that more is better! This more-the-better mentality is not surprising because we saw in the past that the more completely we integrate the cheaper things become. However, the cost and complexity of building billions of transistors on a single device is finally taking a toll on our engineers, which calls for new paradigm shifts in designing complex devices. If chip-design engineers had considered the financial optimization of the overall design process, they would have built things differently. They would have realized that certain functions are better grouped into highly specialized integrated circuits that easily and seamlessly talk to each other without compromising the overall system cost and performance. The key to making this happen is what I call the Lego-Block approach of designing integrated circuits. H- wever, in order for the Lego-Block approach to materialize, we need to change the way we architect our devices. For example, we need to define a new chip-to-chip interconnect protocol, take advantage of multi-chip-module packaging and high-speed SerDes technology, redefine the memory hierarchy to take advantage of 3D solid-state memory instead of blindly increasing the DRAM size, repartition DRAM to serve different logical functions instead of building gigantic single-die DRAM to serve every function, change the way we build DRAM so that they are optimized more for performance and power efficiency instead of capacity, and redefine what should be done in hardware versus software. In short, we need to change our way of thinking, and be brave enough to reject common wisdom! If we fail to take action, soon we will no longer see cost savings. On the other hand, if we succeed, we will see life beyond the end of Moore´s Law!
Keywords :
innovation management; integrated circuit design; 3D solid state memory; IC design innovation; Lego block approach; chip-to-chip interconnect protocol; device architecture; high speed SerDes technology; memory hierarchy; multichip module packaging; Bandwidth; Buildings; Integrated circuit interconnections; Random access memory; Smart phones; System-on-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
Type :
conf
DOI :
10.1109/ISSCC.2015.7062847
Filename :
7062847
Link To Document :
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